National Semiconductor Corporation has introduced a quad multipoint-low-voltage differential signaling (M-LVDS) transceiver designed for backplane clock distribution in Advanced Telecom and Computing Architecture (ATCA) and MicroTCA line cards.
The new quad-channel transceiver is compliant with the EIA/TIA-899 M-LVDS standard and provides a balance of integration and ease of design to reduce board space and design time in end equipment -- such as wireless base stations, communications routers and LXI test instruments.
The DS91M040 drives and receives clock and data signals in multipoint network applications supporting up to four networks simultaneously. It can manage as many as 32 loads at clock frequencies of up to 125 MHz and data transfers of up to 250 Mbps.
The transceiver addresses multipoint and multidrop clock and data distribution applications where a common bus connects multiple drivers and receivers.
The transceiver’s edges, with two nanosecond typical rise and fall times, minimise signal reflections due to unterminated backplane stubs. A feedback-controlled output provides constant amplitude regardless of whether the backplane is fully loaded or populated with a single card.
It also includes pin-control of the M-LVDS receiver, which allows designers to enable a receiver failsafe (type 2) or provide no failsafe (type 1) depending on the application. This reduces a manufacturers’ required inventory by eliminating the need to stock two separate transceivers. The DS91M040 provides an upgrade path to manufacturers that use RS-485 transceivers.